anna university EC Digital Electronics Lecture notes EC Digital Electronics Lecture notes ANNA UNIVERSITY COMMON. 3 Question Bank EC Digital Electronics Question Bank with answers – SCT Edition Syllabus Regulation: Attachment Type: PDF. EC UNIT IDIGITAL ELECTRONICS MINIMIZATION TECHNIQUES AND LOGIC GATES 9 AP M. Morris Mano, Digital Design, 3 Edition, Prentice Hall of India Pvt. Ltd., / Pearson Education . ECE II TO VIII syllabus. Uploaded.

Author: Kajikinos Bragrel
Country: China
Language: English (Spanish)
Genre: Music
Published (Last): 1 April 2006
Pages: 79
PDF File Size: 13.2 Mb
ePub File Size: 19.34 Mb
ISBN: 182-7-41989-458-7
Downloads: 3545
Price: Free* [*Free Regsitration Required]
Uploader: Nikus

How will you convert a JK flip flop into a D flip flop. How many flip —flops are needed to build an 8 bit shift register? What theorem is used when digifal terms in adjacent squares of K map are combined? What is Hamming code? And reduce primitive flow table.

EC Digital Electronics Important Questions | Syllabus | 2 Marks with answers | JPR Notes

A seven bit Hamming code is received as What is the difference between a Mealy machine and a Moore Machines? Design a combinational circuit using a ROM ,that accepts a 3- bit number and. When is a counter said to suffer from lock out?


Convert the decimal number to hexadecimal. How to eliminate the hazard? Give the classification of memory. Explain the operation of 4 to 10 line decoder with necessary logic diagram. Distinguish between positive logic and negative logic.

Generate the even parity Hamming codes for the following binary data. Find the sullabus equivalent of the hexadecimal number AB. What are the steps for the design of asynchronous sequential circuit? Show that the NAND gate is a universal building block. Develop the state diagram and primitive flow table for a logic system that has 2 inputs,x. How is it avoided?

What is the minimum number of flip flops needed to build a counter of modulus z 8? What are the principle differences between synchronous and asynchronous networks.

Unit — V Asynchronous Sequential Logic. What do you mean by comparator? NAND gates the output function does not change.

What is the primary disadvantage of an asynchronous counter? Define half sub tractor and full sub tractor.

What are Mealy and Moore machines? List the basic types of programmable logic devices.

Find the octal equivalent of the decimal number Give hazard — free. What is meant by multilevel gates networks?

How synchronous counters differ diyital asynchronous counters? What are the applications of a shift register? Write down the truth table of a full adder. Encode the ten decimal digits in the 2 out of 5 code. Show that the Excess — 3 code is self —complementing. Design the combinational circuit with 3 inputs and 1 output. Find the decimal equivalent of 9.


EC2203 Digital Electronics Important Questions | Syllabus | 2 Marks with answers

What do you mean by encoder? What is the objective of state assignment in asynchronous circuit? Summarize the design procedure for asynchronous sequential circuit. Find the syntax errors in the following declarations note that names for primitive gates.

How does ROM retain information? Distinguish between fundamental electrnics and pulse mode operation of asynchronous. What is meant by weighted and non-weighted coding? Implement the above Boolean functions. Draw the circuit of the minimal expression using only NAND gates. Use SR latch for implementation of the circuit. How will you complement of the counters of the.